1. Field of the Invention
Example embodiments of the present invention relate to a semiconductor device and/or gate structure having a composite dielectric layer and methods of manufacturing the same. Other example embodiments of the present invention relates to a semiconductor device and/or gate structure having a composite dielectric layer including a material having a higher dielectric constant and methods of manufacturing the same.
2. Description of the Related Art
Semiconductor devices may be classified as a volatile memory device and/or a non-volatile memory device. Examples of volatile memory devices may include dynamic random access memory (DRAM) devices and/or static random access memory (SRAM) devices. Examples of non-volatile memory devices may include read only memory (ROM) devices and electrically erasable programmable read only memory (EEPROM) devices. Examples of EEPROMs may include flash memory devices.
Flash memory devices may includes source/drain regions formed in a surface of a substrate (e.g. a silicon wafer), a channel region, a tunnel dielectric layer formed on the substrate, a floating gate electrode formed on the tunnel dielectric layer, a gate dielectric layer formed on the floating gate electrode and/or a control gate electrode formed on the gate dielectric layer.
An example of a gate dielectric layer may include a composite dielectric layer having an oxide-nitride-oxide (ONO) structure. In order to achieve a higher integration, a dielectric layer of a material, having a higher dielectric constant, may be used as the gate dielectric layer of the non-volatile memory device instead of the composite dielectric layer having the ONO structure. The dielectric layer of the material, having the higher dielectric constant, also may be used as a gate layer of a metal oxide semiconductor (MOS) transistor and/or a dielectric layer of a capacitor. The dielectric layer may be formed of aluminum oxide (Al2O3), hafnium oxide (HfO2) and/or zirconium oxide (ZrO2).
The conventional art acknowledges that a dielectric layer of zirconium oxide may be formed by using Zr[N(CH3)(C2H5)]4 (tetrakis ethyl methyl amino zirconium: TEMAZ) as a reaction material. In addition, conventional methods also recognize that a dielectric layer of zirconium oxide may be formed by using ZrCl4 as a reaction material.
As known in the conventional art, a dielectric layer, which may include an aluminum oxide layer and/or an alloy layer, may be formed on the aluminum oxide layer. The alloy layer may include tantalum oxide, zirconium oxide, hafnium oxide, hafnium aluminum oxide and/or lanthanum aluminum oxide.
According to conventional methods, a dielectric layer may include a silicate interface layer and/or a layer that may have a dielectric constant of about 20. The layer may be formed on the silicate interface layer. In addition, the layer may be a hafnium oxide layer, a zirconium oxide layer, a tantalum oxide layer, an aluminum oxide layer, a titanium oxide layer, an yttrium oxide layer, a BST layer and/or a lead zirconium titanate (PZT) layer.
Furthermore, conventional methods of nitriding a surface of a conductive layer for the formation of a floating gate are known in the art.